NoteVerse

Flip flops

Comprehensive study notes, diagrams, and exam preparation for Flip flops.

Flip flops

Definition

A flip-flop is a bistable sequential logic circuit that can store one bit of binary information (0 or 1). Unlike combinational circuits, whose outputs depend only on current inputs, a flip-flop’s output depends on both the current inputs and its previous state. Because of this memory property, flip-flops are the fundamental building blocks of registers, counters, memory elements, and many digital systems.

A flip-flop usually has two stable output states, commonly labeled Q and Q̅ (Q-bar, the complement of Q). It changes state only when triggered by a control signal such as a clock or an enabling input, making it essential in synchronous sequential logic.

Main Content

1. Basic Concept of Flip-Flops

Memory element and bistability

A flip-flop can remain in either of its two stable states indefinitely until a triggering event causes it to switch. This makes it a 1-bit storage device. For example, if Q = 1, it can keep that value even after the input changes, until the next valid clock event.

Sequential behavior

The output depends on the present input and the stored past state. This is what makes flip-flops different from gates like AND, OR, and NOT, which have no memory. In practical systems, this allows digital devices to remember counts, codes, states, and timing information.

Representation of a flip-flop

A flip-flop is often shown as a block with input lines, a clock input, and output lines:

        +------------+
Input ->|            |-> Q
Clock ->| Flip-Flop  |-> Q̅
        +------------+

Core characteristics

  • Stores one bit
  • Has two stable states
  • Controlled by a clock or trigger
  • Used in synchronous circuits
  • Forms the basis of registers and counters

2. Types of Flip-Flops

SR Flip-Flop (Set-Reset)

The SR flip-flop has two main inputs: S for set and R for reset. If S = 1 and R = 0, Q becomes 1; if S = 0 and R = 1, Q becomes 0. However, the condition S = 1 and R = 1 is usually invalid or undesirable because it can create an uncertain state. It is simple, but its invalid condition limits its practical use.

JK, D, and T Flip-Flops

These are improved versions designed to avoid problems found in SR devices.

  • JK flip-flop: Removes the invalid state of SR. If J = K = 1, it toggles output.
  • D flip-flop: Stores the value present at the input D at the clock edge. It is widely used in registers and memory.
  • T flip-flop: Toggles output when T = 1 and holds when T = 0. It is useful in counters and frequency division.

Common flip-flop symbol idea

         +----------------+
J or D ->|                |-> Q
K or T ->|   Flip-Flop    |-> Q̅
Clock  ->|                |
         +----------------+

Comparison of major types

SR

  • simple but has invalid input condition

JK

  • versatile and toggle-capable

D

  • data storage and synchronization

T

  • toggling and counting applications

3. Characteristic Table, Excitation, and Timing Behavior

Characteristic table

This table shows how the output changes for each input combination. For example, in a D flip-flop, the next state is always equal to D at the triggering moment. In a JK flip-flop, the next state depends on the current state and the J/K inputs.

Excitation table

The excitation table tells us what inputs are required to move the flip-flop from the current state to a desired next state. This is especially useful in designing sequential circuits and state machines.

Timing behavior and clock edge triggering

Flip-flops usually respond only at a specific clock edge, either the rising edge or falling edge. This prevents continuous output changes and ensures synchronized operation across a system.

Example: D flip-flop behavior

Clock event D Q(next)
Rising edge 0 0
Rising edge 1 1

Example: T flip-flop behavior

Clock event T Q(next)
Rising edge 0 Q (no change)
Rising edge 1 Q̅ (toggle)

Timing terms

Propagation delay

  • time taken for output to change after the clock edge

Setup time

  • input must be stable before the clock edge

Hold time

  • input must remain stable after the clock edge

Clock edge

  • exact moment the flip-flop samples input

Working / Process

1. Input preparation and stabilization

The input signal is applied to the flip-flop and must remain stable for the required setup time before the clock edge. This is necessary so the internal logic can accurately determine the correct next state.

2. Clock triggering and state capture

When the active clock edge arrives, the flip-flop samples the input and stores it internally. The output does not continuously follow the input; it changes only at the triggering moment.

3. Output update and memory retention

After the clock event, Q changes to the new state after a short propagation delay and then remains stored until the next valid trigger. This stored state acts as memory in sequential systems.

Example of operation in a D flip-flop

  • If D = 1 before the rising edge, then Q becomes 1 at the edge.
  • If D later changes to 0 without a new clock edge, Q remains 1.
  • Only the next active clock edge can update Q.

Simple timing view

Clock:  __|‾|__|‾|__|‾|__
D:      ----1-----0---1---
Q:      ----1-----1---0---

This shows that output changes only at clock edges, not whenever D changes.

Advantages / Applications

Reliable storage of binary data

Flip-flops store one bit accurately and maintain state until changed, making them ideal for memory elements in digital systems.

Foundation of sequential circuits

They are used to build registers, shift registers, counters, finite state machines, and control units. Almost every synchronous digital device depends on flip-flops in some form.

High-speed synchronization and timing control

Because they respond to clock signals, flip-flops help synchronize data across a system and reduce timing uncertainty in complex digital circuits.

Common applications

  • Registers in CPUs and microprocessors
  • Binary counters and frequency dividers
  • Shift registers for serial/parallel conversion
  • Data synchronization in communication systems
  • State storage in control circuits
  • Memory cells in digital electronics

Summary

  • A flip-flop is a bistable sequential circuit that stores one bit.
  • It changes state only at a control event, usually a clock edge.
  • Common types include SR, JK, D, and T flip-flops.

Important terms to remember

  • Bistable
  • Clock edge
  • Setup time
  • Hold time
  • Propagation delay
  • Next state
  • Memory element
← Prev: ALU
Next: Edge triggered circuits →