2732 etc. & Their Address Decoding

Definition

2732 etc. refers to the family of small-capacity ROM/EPROM memory chips such as the 2732 EPROM, which typically stores 4K × 8 bits of data, and similar devices in the 27xx memory series.
Address decoding is the hardware method of generating a chip select signal based on the higher-order address lines so that a specific memory IC is enabled only for its assigned address range.

Main Content

1. 2732 EPROM and Similar Memory Devices

The 2732 EPROM is a non-volatile memory chip commonly used to store programs permanently or semi-permanently. It retains data even when power is off, which makes it ideal for firmware and fixed control logic.
The memory organization of a 2732 chip is typically 4096 locations × 8 bits. This means it has 12 address lines because $2^{12} = 4096$ , and it provides 8-bit data output on each address.
Similar devices in the same memory family include other EPROMs and ROMs such as 2716, 2764, 27128, 27256, etc., which differ mainly in capacity and the number of address lines required.
These chips are widely used in systems where the CPU needs a stored instruction set, boot code, or lookup tables.
Since the 2732 is an EPROM, it can be electrically programmed and then erased using ultraviolet light, making it useful in development and testing.

2. Need for Address Decoding

A processor may have a large address space, but a memory chip occupies only a small part of that space. Therefore, we must map each chip to a unique address range.
Address decoding ensures that only one memory chip responds when the CPU places an address on the bus. This prevents multiple memory devices from driving the data bus simultaneously.
Without decoding, two or more chips could produce output at the same time, causing bus conflict, corrupted data, and unpredictable circuit behavior.
Address decoding also allows designers to divide memory into blocks and place ROM, RAM, I/O devices, and peripherals at different address locations.
In microprocessor systems, decoding is especially important for memory-mapped I/O and for building larger memory systems by combining multiple chips.

3. Address Decoding Methods

Full decoding

uses all the necessary higher-order address lines to ensure that exactly one chip is selected for one unique address range. It gives accurate memory mapping but needs more logic hardware.

Partial decoding

uses only some of the higher-order address lines. It is simpler and cheaper, but it may create mirror images or repeated address ranges because unused address lines are ignored.
Decoding can be done using logic gates such as AND, NAND, OR, NOR, or with decoder ICs like 74LS138 and 74LS139.
For example, if a 2732 EPROM is mapped into a system memory space, the lower 12 bits of the address select the internal location, while the upper bits are decoded to generate the chip enable signal.
The choice between full and partial decoding depends on cost, available hardware, required memory size, and system reliability.

Working / Process

1. Identify the memory size and address lines

For a 2732 EPROM, the memory size is 4K × 8, so 12 address lines are needed for internal addressing.
The remaining higher-order address lines from the CPU are used for selecting the chip in the memory map.

2. Decode the higher-order address lines

Use logic gates or a decoder IC to examine the upper address bits.
The decoded output becomes active only when the processor places a valid address within the assigned range of the 2732 chip.

3. Enable the chip and access data

When the chip select signal is active, the EPROM places the stored 8-bit data onto the data bus during a read cycle.
During other addresses, the chip remains disabled, and the bus is free for other memory devices.

Example of memory mapping for a 2732 EPROM:

If a system has a 16-bit address bus, the 2732 may be assigned the address range:

0000H to 0FFFH

Here:

A0–A11 select one of the 4096 internal bytes
A12–A15 are decoded to activate the chip

Example ASCII memory selection idea:

CPU Address Bus
A15 A14 A13 A12 A11 ... A0
 |   |   |   |           |
 +---+---+---+-----------+----> Internal address of 2732 (A0-A11)
     |
     +--------------------------> Address decoder
                                   |
                                   +----> Chip Select for 2732

If another memory chip is mapped to 1000H to 1FFFH, then its chip select must be generated by a different decoding combination of the upper address bits. This allows each chip to occupy a distinct memory block.

Advantages / Applications

Reliable storage of fixed code

: 2732 EPROMs are used to store startup programs, firmware, and control software that should not be lost when power is removed.

Efficient memory expansion

: Address decoding allows several memory chips to work together in one system without overlap, enabling larger memory spaces.

Useful in microprocessor-based systems

: They are commonly used in embedded controllers, training kits, educational microprocessor labs, and older computer architectures.

Supports clear memory organization

: Decoding helps divide memory into ROM, RAM, and I/O regions for clean and predictable system design.

Helps in system debugging and development

: EPROMs can be erased and reprogrammed, making them useful for testing code and hardware behavior.

Prevents bus contention

: Proper decoding ensures only one device drives the data bus at a time, improving stability and correctness.

Foundation for sequential systems

: Stored instructions and state-dependent behavior are central to sequential logic, where outputs depend on current inputs and previous states.

Summary

The 2732 is a 4K × 8 EPROM used to store fixed digital data and program code.
Address decoding selects the correct memory chip by interpreting higher-order address lines.
Proper decoding prevents overlap, bus contention, and memory access errors.
Important terms to remember: EPROM, address lines, chip select, full decoding, partial decoding, memory map