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S-R

Comprehensive study notes, diagrams, and exam preparation for S-R.

S-R Flip-Flop

Definition

An S-R flip-flop is a bistable sequential logic circuit that has two inputs, S (Set) and R (Reset), and two complementary outputs, Q and Q̅. It stores one bit of information by setting the output to 1, resetting it to 0, or holding its previous state depending on the input combination and the type of implementation used.

Set (S)

  • : Forces the output Q to 1

Reset (R)

  • : Forces the output Q to 0

Hold condition

  • : Preserves the previous output state

Invalid condition

  • : In some forms, a particular input combination is not allowed because it creates ambiguity

Main Content

1. Basic Structure of S-R Flip-Flop

  • The S-R flip-flop is built using two cross-coupled logic gates or logic elements, so that each output feeds back into the other gate’s input.
  • This feedback gives the circuit its bistable nature, meaning it has two stable output states: one representing logic 1 and the other representing logic 0.

Key idea of bistability:

  • State 1: Q = 1, Q̅ = 0
  • State 2: Q = 0, Q̅ = 1

This memory property allows the circuit to remember a bit even after the input is removed.

Example: If a control system needs to remember whether a machine is ON or OFF, the S-R flip-flop can store that state until a new command changes it.

Typical logic representation:

        +-----------+
S ----->|           |-----> Q
        |  S-R      |
R ----->| Flip-Flop |-----> Q̅
        +-----------+

2. Inputs and Output Behavior

  • The two primary inputs are S and R, and the outputs are Q and Q̅, which are always expected to be complements of each other in valid operating states.
  • Depending on the input combination, the flip-flop can set, reset, or hold its current state.

In a basic active-high S-R latch:

S = 1, R = 0

  • → Set: Q becomes 1

S = 0, R = 1

  • → Reset: Q becomes 0

S = 0, R = 0

  • → Hold: previous state remains unchanged

S = 1, R = 1

  • → Invalid/forbidden state in the NOR-based version

Truth table for NOR-based S-R latch:

S R Q(next) Operation
0 0 Q(prev) Hold
0 1 0 Reset
1 0 1 Set
1 1 Invalid Not allowed

Example: If Q was previously 0 and S = 1, R = 0, then the circuit stores 1. If later both inputs return to 0, the circuit still keeps Q = 1.

3. Types of S-R Flip-Flop Implementations

  • The S-R flip-flop can be implemented using NOR gates or NAND gates, and the input logic differs depending on the gate type.
  • These two versions are the most common and must be understood clearly because their active input levels are opposite.

(a) NOR-based S-R latch

  • Uses active-high inputs
  • Set is done by applying 1 to S
  • Reset is done by applying 1 to R
  • The forbidden input condition is S = 1, R = 1

(b) NAND-based S-R latch

  • Uses active-low inputs
  • Inputs are often written as S̅ and R̅
  • Set happens when S̅ = 0
  • Reset happens when R̅ = 0
  • The forbidden state is S̅ = 0, R̅ = 0

NAND-based truth table:

S̅ R̅ Q(next) Operation
1 1 Q(prev) Hold
1 0 0 Reset
0 1 1 Set
0 0 Invalid Not allowed

ASCII diagram of a NOR-based S-R latch:

           +--------+
   S ----->|  NOR   |-----> Q
           |        |
   Q̅ <-----|        |
           +--------+
              ^
              |
              | feedback

           +--------+
   R ----->|  NOR   |-----> Q̅
           |        |
   Q <----- |        |
           +--------+

This feedback arrangement is what allows the latch to store information.

Working / Process

1. Apply inputs S and R

  • The circuit receives a binary combination at the S and R terminals.
  • The meaning of the inputs depends on whether the latch is NOR-based or NAND-based.
  • Based on the applied inputs, one output is forced and the other follows through feedback.

2. Circuit responds and updates output

  • If the set condition is applied, Q becomes 1.
  • If the reset condition is applied, Q becomes 0.
  • If the hold condition is applied, the stored state remains unchanged because the feedback preserves the previous output.

3. Stable state is maintained

  • After the controlling input is removed, the latch continues to retain the last valid output.
  • This is the essential memory function of the S-R flip-flop.
  • The circuit stays in that state until another valid input changes it.

Simple working example:

  • Suppose Q = 0 initially.
  • Apply S = 1 and R = 0.
  • The output changes to Q = 1.
  • Return S and R to 0.
  • Q remains 1 because the circuit stores the state.

Advantages / Applications

Simple and easy to understand

  • The S-R flip-flop is the most basic form of memory circuit, making it ideal for learning sequential logic.

Useful for storing a single bit

  • It can remember one binary value, which is useful in control and storage systems.

Foundation for advanced circuits

  • Many other flip-flops and latches are designed by improving or modifying the S-R structure.

Applications:

  • Switch debouncing circuits
  • Basic memory storage
  • Control and timing circuits
  • Alarm and latch systems
  • As a building block in registers and counters
  • State retention in digital control logic

Example application: A push-button ON/OFF control can use an S-R latch so that a brief button press can set the output ON and another press can reset it OFF, without needing the button to stay pressed.

Summary

  • The S-R flip-flop is a basic bistable circuit used to store one binary bit.
  • It has Set and Reset inputs that control the output state.
  • It is important because it introduces the memory concept in digital electronics.

Important terms to remember

  • S (Set)
  • R (Reset)
  • Q
  • Q̅
  • Latch
  • Bistable
  • Feedback
  • Invalid state
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