PMOS

Definition

A PMOS transistor is a field-effect transistor in which current flows through a p-type channel formed between the source and drain when an appropriate negative gate-to-source voltage is applied. The gate is insulated from the channel by a thin oxide layer, so the device is voltage-controlled rather than current-controlled.

In simple terms:

Source

• provides holes

Drain

• collects holes

Gate

• controls whether the channel exists or not
• The transistor turns ON when the gate is sufficiently more negative than the source

A PMOS transistor is written as:

P-channel MOSFET

PMOS

• sometimes simply P-type MOS transistor

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Main Content

1. PMOS Structure and Construction

• A PMOS transistor is built on an n-type substrate or inside an n-well region in CMOS fabrication.
• It has two heavily doped p-type regions called the source and drain, separated by a small gap where the channel forms.
• Above this gap lies the gate terminal, insulated by a very thin layer of silicon dioxide or another gate dielectric.

A simplified structure looks like this:

        Gate
     ___________
    |           |
    |   Oxide   |
    |___________|
   P+           P+
 Source         Drain
      \         /
       \_______/
        n-type
       substrate

In a PMOS transistor:

• The source and drain are p-type
• The body/substrate is n-type
• The gate controls the formation of a p-channel by attracting holes

When the gate voltage is high relative to the source, the transistor is OFF. When the gate is pulled lower than the source by enough voltage, a conducting channel forms and current can flow.

2. PMOS Operation and Carrier Behavior

• PMOS devices operate using holes as the majority carriers.
• A negative gate-to-source voltage attracts holes toward the oxide interface and repels electrons away.
• When the voltage difference becomes large enough, an inversion layer forms, creating a conductive p-type channel.

The key operating idea is:

• If VGS is near 0 or not negative enough, PMOS is OFF
• If VGS is sufficiently negative, PMOS is ON

For a PMOS transistor, the threshold voltage is usually represented as a negative value. The device turns on when:

• $V_{GS} < V_{TP}$

where $V_{TP}$ is the threshold voltage of the PMOS transistor.

Because the carriers are holes, PMOS devices often have:

• Lower mobility than electrons
• Lower switching speed than NMOS in many technologies
• Useful pull-up behavior in CMOS circuits

3. PMOS Characteristics and Symbol

• The PMOS symbol includes an arrow pointing inward toward the device, indicating p-channel behavior.
• Its operation is opposite to NMOS in terms of gate polarity.
• PMOS exhibits three main regions of operation:
• Cutoff region: transistor OFF
• Linear/Triode region: behaves like a resistor
• Saturation region: current becomes relatively constant for a given gate voltage

A common PMOS symbol representation:

      D
      |
     |\
G ----| >---- S
     |/
      |

Important characteristics include:

Gate insulation

• : very high input impedance

Voltage control

• : very small gate current

Current drive

• : depends on device size and biasing

Complementary use with NMOS

• : key to CMOS design

In practical circuits, PMOS is often connected with its source at a higher potential, commonly to VDD in digital logic.

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Working / Process

1. Initial State: No Conducting Channel

• When the gate voltage is equal to or higher than the source voltage, holes are not attracted to the channel region.
• The area between source and drain remains non-conductive.
• Only a tiny leakage current may flow.

2. Applying a Negative Gate Bias

• When the gate is pulled lower than the source, the electric field across the oxide changes.
• Electrons are repelled from the surface and holes are attracted toward the interface.
• This starts forming an inversion layer in the n-type region.

3. Channel Formation and Current Flow

• If the gate-to-source voltage becomes more negative than the threshold voltage, a continuous p-type channel forms.
• Holes can now move from source to drain.
• Conventional current flows from source to drain in PMOS operation, depending on circuit biasing.
• Once formed, the channel conductivity depends on the magnitude of gate voltage and drain-source voltage.

A simplified ON/OFF illustration:

OFF state:                     ON state:

Gate high                      Gate low
   |                               |
   V                               V
  [ ]                             [ ]
 Source   no channel              Source====channel====Drain
 Drain

In a CMOS inverter:

• PMOS is ON when input is low
• NMOS is ON when input is high

This complementary action produces efficient switching with very low static power consumption.

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Advantages / Applications

Low Power Consumption in CMOS

• PMOS is a critical part of CMOS circuits, where nearly zero steady-state current flows except during switching.
• This makes modern digital ICs energy-efficient.

High Input Impedance

• The insulated gate draws extremely small current.
• This makes PMOS useful for voltage-controlled switching and amplification stages.

Useful in Complementary Logic and Analog Circuits

• PMOS works with NMOS to build inverters, NAND/NOR gates, multiplexers, latches, and memory cells.
• It is also used in analog current mirrors, load devices, and level-shifting circuits.

Other important applications include:

• CMOS integrated circuits
• Power management circuits
• Pull-up networks in logic design
• Load transistors in active-load amplifiers
• Switches in mixed-signal and analog ICs

PMOS is especially valuable where a device must connect a node to the positive supply rail or provide a pull-up path.

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Summary

• PMOS is a p-channel MOS transistor controlled by gate voltage.
• It uses holes as charge carriers and turns ON when the gate is sufficiently lower than the source.

• PMOS is widely used in CMOS and low-power electronic circuits.

• Important terms to remember

• Source
• Drain
• Gate
• Channel
• Threshold voltage
• Hole
• Inversion layer
• CMOS