Enhancement and Depletion MOSFET

Definition

A Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is a three-terminal or four-terminal semiconductor device that uses an electric field to control the flow of electrical current through a channel.

MOSFETs are categorized into two primary types based on their construction and mode of operation:

Depletion-Mode MOSFET (D-MOSFET): A type of MOSFET constructed with a physical, built-in conductive channel between the source and drain terminals. It is "normally ON" when the gate-to-source voltage ($V_{GS}$) is zero.
Enhancement-Mode MOSFET (E-MOSFET): A type of MOSFET constructed without a physical channel connecting the source and drain. It is "normally OFF" when the gate-to-source voltage ($V_{GS}$) is zero, requiring an applied gate voltage to create ("enhance") a conductive channel.

Main Content

1. Depletion-Mode MOSFET (D-MOSFET) Construction

Physical Channel and Substrate: The D-MOSFET is constructed on a lightly doped semiconductor substrate (such as P-type silicon for an N-channel device). Two heavily doped regions of the opposite type ($N^+$) are diffused into the substrate to form the Source and Drain. Crucially, a thin physical channel of the same type as the source and drain (an N-channel in this case) is physically deposited during manufacturing to connect these two regions.
Insulation Layer and Gate: A very thin protective layer of Silicon Dioxide ($SiO_2$) is grown on the surface of the substrate over the channel area. $SiO_2$ acts as an excellent electrical insulator. A metal layer (or highly conductive polycrystalline silicon) is deposited on top of the $SiO_2$ layer to form the Gate terminal. Because of this insulating layer, the gate is electrically isolated from the channel, resulting in extremely high input impedance (typically in the range of $10^{10}$ to $10^{15}$ ohms).

        Depletion MOSFET (N-Channel Construction)

                  Gate (G)
                     |
               [Metal Electrode]
          ===== Silicon Dioxide (SiO2) =====
          |  N+  |  N-Channel  |  N+  |
          |Source|=============|Drain |
          | (S)  |             | (D)  |
          +------+-------------+------+
          |       P-Substrate (B)     |
          +---------------------------+
                     |
                 Substrate

2. Enhancement-Mode MOSFET (E-MOSFET) Construction

Absence of a Physical Channel: Similar to the D-MOSFET, the E-MOSFET is built on a semiconductor substrate (e.g., P-type substrate for an N-channel device) containing two heavily doped $N^+$ regions that act as the Source and Drain. However, there is no physical channel diffused between the Source and Drain. The P-type substrate extends all the way to the insulating $SiO_2$ layer beneath the gate.
Normally OFF State: Because there is no pre-existing conductive path between the Source and Drain, applying a voltage between them while keeping the Gate terminal grounded ($V_{GS} = 0\text{V}$) results in no current flow, except for a negligible leakage current. The device acts like an open switch until a proper voltage is applied to the Gate to induce a channel.

       Enhancement MOSFET (N-Channel Construction)

                  Gate (G)
                     |
               [Metal Electrode]
          ===== Silicon Dioxide (SiO2) =====
          |  N+  |             |  N+  |
          |Source|  No Channel |Drain |
          | (S)  |             | (D)  |
          +------+-------------+------+
          |       P-Substrate (B)     |
          +---------------------------+
                     |
                 Substrate

3. Schematic Symbols and Differences

D-MOSFET Symbol Representing the Channel: The schematic symbol for a D-MOSFET features a solid, continuous vertical line representing the pre-existing, continuous physical channel between the Drain (D) and Source (S). For an N-channel D-MOSFET, the arrow on the substrate (or bulk/body) terminal points inward toward the channel, while for a P-channel D-MOSFET, the arrow points outward.
E-MOSFET Symbol Representing the Broken Channel: The schematic symbol for an E-MOSFET features a dashed or broken vertical line connecting the Drain and Source terminals. This broken line visually represents the physical absence of a channel when the gate voltage is zero. Like the D-MOSFET, the direction of the arrow on the substrate terminal indicates the channel polarity (pointing inward for N-channel, outward for P-channel).

Working / Process

1. Operation of the Depletion-Mode MOSFET (D-MOSFET)

Depletion Mode (Negative $V_{GS}$ for N-Channel): When a negative voltage is applied to the Gate relative to the Source, the negative charge on the Gate plate repels the free electrons (majority carriers) out of the N-channel into the P-substrate. At the same time, it attracts positive holes from the P-substrate into the channel. This action depletes the channel of free electrons, narrowing its effective width, increasing its resistance, and reducing the drain current ($I_D$). If the gate voltage is made negative enough, it reaches the "pinch-off voltage" ($V_p$), where the channel is completely depleted of free electrons, and $I_D$ drops to zero.
Enhancement Mode (Positive $V_{GS}$ for N-Channel): When a positive voltage is applied to the Gate, the positive charge on the Gate plate attracts additional free electrons from the $N^+$ Source and Drain regions, as well as minority electrons from the P-substrate, into the channel. This increases ("enhances") the concentration of free charge carriers within the channel, decreasing its resistance and allowing the drain current ($I_D$) to rise above its zero-gate-voltage saturation current level ($I_{DSS}$).

2. Operation of the Enhancement-Mode MOSFET (E-MOSFET)

Sub-Threshold and Inversion Layer Formation: When the Gate-to-Source voltage ($V_{GS}$) is zero, the back-to-back PN junctions formed between the P-substrate and the $N^+$ source/drain regions block any current flow. As $V_{GS}$ is gradually increased in the positive direction, the positive charge on the Gate repels holes in the P-substrate away from the area beneath the gate, leaving behind a depletion region of immobile negative ions.
Inversion Layer and Conduction: As $V_{GS}$ continues to increase beyond a specific limit called the Threshold Voltage ($V_{th}$), the strong electrostatic field attracts free minority electrons from the substrate and the source/drain regions to the surface just under the $SiO_2$ layer. These accumulated electrons outnumber the holes in that localized region, causing the surface layer of the P-type substrate to undergo "inversion" and behave like an N-type material. This induced thin layer of N-type material forms a continuous conductive channel connecting the Source and Drain. Applying a voltage between the Drain and Source ($V_{DS}$) now causes a current ($I_D$) to flow.

3. Current-Voltage Equations and Transfer Curves

D-MOSFET Mathematical Modeling: The transfer characteristics of a D-MOSFET are modeled using Shockley's equation: $I_D = I_{DSS} \left(1 - \frac{V_{GS}}{V_p}\right)^2$ This equation applies to both negative and positive values of $V_{GS}$. When $V_{GS}$ is negative, the device operates in depletion mode. When $V_{GS}$ is positive, the device operates in enhancement mode.
E-MOSFET Mathematical Modeling: Because the E-MOSFET does not conduct until $V_{GS}$ exceeds the threshold voltage, its current-voltage relation in the saturation region is given by: $I_D = k(V_{GS} - V_{th})^2 \quad \text{for } V_{GS} \ge V_{th}$ Where $k$ is a device parameter (measured in $A/V^2$) determined by the physical dimensions of the channel (width $W$ and length $L$) and the manufacturing technology (gate oxide capacitance $C_{ox}$ and carrier mobility $\mu_n$).

Advantages / Applications

Extremely High Input Impedance: Because the gate terminal is physically and electrically isolated from the active channel by a high-quality silicon dioxide ($SiO_2$) insulating layer, MOSFETs draw virtually zero gate current during steady-state operation.
High Integration Density and Low Power Consumption: E-MOSFETs are the fundamental building blocks of complementary metal-oxide-semiconductor (CMOS) technology. CMOS logic gates use pairs of N-channel and P-channel E-MOSFETs that consume virtually no static power, making them ideal for high-density microprocessors, microcontrollers, and memory chips.
Analog Signal Amplification and RF Circuits: D-MOSFETs are widely used in low-noise RF (radio frequency) amplifiers and communication receivers because they can operate efficiently in both enhancement and depletion modes with minimal bias current adjustments, ensuring highly linear amplification.
High-Speed Switching and Power Control: MOSFETs are majority-carrier devices, meaning they do not suffer from minority carrier storage delays during switching. This makes them ideal for high-frequency switching applications like switch-mode power supplies (SMPS), motor controllers, and class-D audio amplifiers.

Summary

A MOSFET is a field-effect transistor that uses an insulated gate to control conductivity. It is classified into two main types: Depletion-type (D-MOSFET), which features a physically built-in channel and is normally ON at zero gate-to-source voltage, and Enhancement-type (E-MOSFET), which lacks a physical channel and is normally OFF until an applied gate voltage exceeds the threshold level to induce an inversion layer. These devices provide exceptionally high input impedance, low power consumption, and high-speed switching capabilities across digital and analog electronic circuits.